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Monday 28 April 2014

Baby steps

The YASEP's development progresses on many fronts so big results are not visible yet.

I just started http://httap.org/ to document and publish the work on a TAP protocol over HTTP. A lot of multi-language development is going on, while writing articles on many connected subjects.

HTTaP is critical to rewrite the microYASEP from scratch with "Design For Test" in mind. In fact I'm investing time on debug/design tools in the hope that further development will be much faster, like on many occasions in the YASEP project !

In need to deliver a microYASEP VHDL core in a few months so it's pretty critical. The YASEP2014 architecture is still fresh in my head and there are so many details to correct. But some good things emerge anyway, such as my recent rewrite of the register set code (it now allows a "side channel" for address updates) or the removal of the ugly SWAP_IR flag (probably one of the most confusing aspects of the architecture that became finally pointless with the latest instruction format changes).

Translation (to spanish and german) is still on the table though no meaningful progress has occured lately.

As usual, pretty unstable snapshots are uploaded to http://ygdes.com/~whygee/yasep2014 whenever possible, so you can look at the evolution.

Wednesday 26 March 2014

Why ? Pourquoi ?

(Français plus bas)

I get asked this question often : Why design another CPU softcore ?

I (Whygee) design electronic circuits to address the needs of my clients. The commercial solutions are often lacking in flexibility. It's often hard to find the right part number to match a project with its fixed feature set, including I/Os, speed, processing power, memory, peripherals... The chips may be cheap but the whole toolset can become expensive, and requires a Windows computer. On top of that, parts stock obsoletes quickly and long term availability is never certain (will the company go bankrupt or be bought next year ?).

On the other hand, the existing open source softcores do not solve all these problems. Some of them are little student projects with no continuous development, the toolset is often minimal, the requirements or usefulness might be arbitrarily specific, the documentation may be unsufficient...

The YASEP's purpose is not only to create a processor family but also develop the tools that I need and that may be re-used for other projects, in particular to design other CPU architectures. Many softcores need to reinvent the wheel and can't afford to make a sleek integrated IDE. The YASEP is also a reusable modular toolset.

Today, I can wrap the YASEP around customer projects' needs, instead of warping my technical solution around some manufacturers' constraints. In fact, I can solve most of my microcontroller needs and I stock only a handful of FPGA part numbers. If the YASEP solves my problems, it might also solve yours and that's why I have open sourced all the necessary resources.

You will find some background on this project in these presentations: EHSM2012 (english) and JMLL2012 (french).


On me demande souvent : Pourquoi créer encore un autre microprocesseur ?

Mon métier est de réaliser des circuits électroniques pour répondre aux besoins de mes clients. La plupart du temps, les produits commerciaux ne sont pas assez flexible. Il est difficile de trouver la bonne référence de circuit intégré avec les bonnes caractéristiques, qui dispose du bon nombre d'entrées-sorties, qui soit juste assez rapide, avec juste assez de mémoire et les bons périphériques... Les puces sont souvent abordables mais l'ensemble des outils de développements peut coûter très cher, surtout si on doit acheter un ordinateur dédié sous Windows. En plus, les stocks de composants deviennent vite obsolètes et la pérennité à long terme n'est jamais assurée (est-ce que le compagnie va faire faillite ou être rachetée l'année prochaine ?).

D'un autre côté, les softcores open source ne résolvent pas tous ces problèmes. Certains de ces projets sont abandonnés, les outils de développement sont insuffisants ou beaucoup trop restrictifs, la documentation est insuffisante...

L'objectif du YASEP n'est pas juste de créer une famille de processeurs mais aussi de développer des outils dont j'ai besoin et qui peuvent être réutilisés par d'autres projets, en particulier pour concevoir d'autres architectures de processeurs. Beaucoup de projets de softcores doivent réinventer la roue et ne peuvent pas investir le temps pour créer une interface utilisateur aboutie. Le YASEP est donc aussi un ensemble d'outils modulaires et réutilisables.

Aujourdhui, je peux adapter totalement un YASEP pour répondre aux besoins de mes clients, au lieu de plier mes projets aux contraintes des fabricants. En fait, le YASEP convient pour la plupart des projets où un microcontrôleur est requis et je peux garder en stock un nombre plus réduit de références de circuits intégrés. Et si le YASEP résout mes problèmes, il pourrait aussi vous aider et c'est pour cela que je diffuse tous les outils en avec une licence libre.

Pour plus d'informations sur la génèse de ce projet, regardez ces deux présentations : EHSM2012 (anglais) and JMLL2012 (français).

Saturday 20 July 2013

The tracker's backend

The YASEP's website is slowly integrating a tracking system : it will keep a list of open tasks, bugs, features and other stuffs to do. This is a much clearer replacement for the http://yasep.org/changes.txt file that is growing out of hand...

The web interface at http://yasep.org#!track is only embryonic and will take time (months...) to develop. It's a front-end to a publicly accessible bugtracker located at https://bitbucket.org/dahozer/yasep/issues

A "cached" version of the list of opened bugs and tasks will be provided in each version, and it will get updated when opening the window, if the browser can access Internet.

So far, it's a "read only" system : I will keep the control of the bug tracker's contents, because the messages need special formatting to add extra metadata that are useful to me : for example, the estimated effort to complete a task (hours, day, week...). I also want to prevent injection of arbitrary data into the project. If you find any bug, don't hesitate to contact me directly.

Thursday 15 November 2012

The YASEP goes to Berlin

It's official : the YASEP is invited at the Exceptionally Hard & Soft Meeting held in Berlin on december 28-30 2012. 

A 30 minutes talk will present the project, it's shorter than at JM2L but it will be completely in english. It will also be the official transition between YASEP2011 and YASEP2013.

Hopefully, better live demos will be possible by then ;-)

Thursday 4 October 2012


It's official !

The YASEP will be presented during two hours, on saturday, Nov. 24th at Sophia Antipolis, during the Journées Méditerranéennes du Logiciel Libre organised by Linux Azur

Informations are available at http://jm2l.linux-azur.org/content/2012/yasep

The slides will be published during the presentation and will start the transition between the YASEP2011 and YASEP2013 architectures.

There is still a lot of work but it's looking good so far. See you there !

(updated 2012/11/15)

Monday 28 November 2011

A YASEP assembler in C by DeforaOS

Today, khorben from DeforaOS, sent me a surprise : this screenshot !

He is implementing his assembler/disassembler in C for his operating system project. A graphic interface is also available, among the many features in development ! In parallel, I implement some features in the YGWM interface that synthesise and export the relevant informations needed by his assembler. In the end we'll both have the tools to create a full working and autonomous system :-)

Thanks again for the screenshot !

Friday 13 November 2009

Support of Alphanumeric LCD with YASEP

I have been very busy since august, unfortunately not with YASEP but I keep an eye on this project. Even though I can't dedicate days and weeks to this, I try to gather things here and there when they appear, like electronic parts, ideas, and ways to implement them.

For example I've been thinking about how to display informations with a simple FPGA kit.  I already have a nice collection of alphanumeric LCD modules that is expanding, so they are a good and cheap output peripheral.

From there, at least three things follow :

  1. The modules I own have different resolutions : from 1x8char to 4x20 but there is no electronic means to distinguish them from the others. So I recently imagined a method, discussed a bit about it on USENET and decided that it was worth implementing it. I am writing a RFC about this now.
  2. I'm going to add a set of Special Registers that support the parallel interface to a LCD module in nibble mode. This is going to provide automatic strobes, and ease application software development. This unit will also support readback of LCD resolution, supporting the protocol defined in 1. Contrast voltage is controlled by a simple PWM/PD circuit instead of a trimpot.
  3. While looking around for more informations about the HD44780-compatible modules, wikipedia sent me to a JavaScript HD44780 simulator designed years ago by Dincer Aydin. He has done even crazier things like a graphic LCD simulator or a PIC assembler in JavaScript ! I asked if I could reuse the alphanumeric code and Dincer kindly accepted :-D I have not looked at the source code but I presume that it's going to need a lot of work (particularly for updating the display engine, because updates are "optimised out" in Firefox). Anyway the YASEP simulator is not even mature enough so there is no hurry... 
Everything seems to be in place for a future use of alphanumeric LCD modules. I have more than 20pc available, I have already used some of them on a past PIC project, and the JavaScript framework will support them. I'm not saying it's going to be easy, but it's far easier than I thought !